BPro: IBIS Modeling


BPro: SPISim’s IBIS modeling tool… “B” for “IBIS”

Application Scopes:

  • IBIS model data visualization and inspection;
  • Full IBIS model generation flow: from Spice to IBIS and also IBIS to Spice.
  • IBIS model figure of merits (FOM) reporting;
  • Support from IBIS V3.2 (signal only) to IBIS V5.1 (power aware) model generation.

Key Features:

  • Easy operation to inspect and visualize IBIS modeling data, cross referenced between texture content and waveform curve;
  • Easy switching between TYP/MIN/MAX only corners or VCC/VSS relative voltage reference plot;
  • Generate IBIS model either from scratch (buffer design) or existing simulation data;
  • Best-known-method based flow for IBIS model generation:
    • Reusable configuration, optional call-back scripts for customized flow;
    • Set-up testbench circuit to drive buffer model;
    • Simulate with customized simulator (default is HSpice) in multi-threaded mode;
    • Optimized data processing and point selection to generate compact yet accurate model;
    • Fine tuning capabilities for easy overclocking while maintaining accuracy;
    • Golden checker for syntax check and debug;
    • Generate test bench validating generated IBIS model;
    • Figure of merit quality reporting;
    • IBIS to spice conversion to be used in Spice3f5 based simulator.
    • Work on top of VPro or MPro module to leverage existing capabilities;
    • Built-in IBIS checker and BSIM compatible spice simulator. Works with other simulators like HSpice, Eldo and Spectra as well.

Module overview: Further details on BPro’s capabilities are available [HERE].

Overview slides: View externally [HERE]

Features details: View externally [HERE]

Video demo: View externally [HERE]


System Requirements:

  • Windows, Linux or OSX
Product Info